DDR MEMORY In the last few years, CPU speeds has accelerated exponentially. Yet, computer memory speed has not matched to the expectations. We saw the mass migration from PC100 memory to PC133 memory in 1999. During the time, Intel also introduced Rambus memory as a new memory solution to the PC industry. In the transition, each memory technology promises more bandwidth and performance. In theory, higher memory bandwidth will deliver better performance for the computer system. Memory peak bandwidth is defined as memory bus width/8 bits x data rate. That translates into how fast your 3D games will react, how smooth your MP3 music will play or how good a motion picture you can play in your MPEG video streaming. This year, a new type of memory called DDR has shown up in the new PC’s. Although it is a mystery to most users, it is the result of more than three years of engineering work at an industry collaboration involving hundreds of top memory and system design engineers. This new kind of DDR memory is promising yet more memory bandwidth and performance. But best of all, it is at lower prices in comparison to Rambus memory. Bandwidth calculation: memory bus width/8 bits x data rate. PEAK MEMORY BANDWIDTH CHART What is DDR? DDR is an abbreviation for "Double Data Rate". DDR is indeed very similar to the normal Synchronous DRAM. The normal Synchronous DRAM (we now called SDR) was evolved out of the standard DRAM. The standard DRAM receives its address command in two address words. It is a multiplex scheme to save input pins. The first address word is latched into the DRAM chip with the Row Address Strobe (RAS). Following the RAS command is the Column Address Strobe (CAS) for latching the second address word. Shortly after the Ras and Cas strobes, the stored data is valid for reading. The SDR DRAM combines a clock with the standard DRAM. The Ras, Cas, and also Data valid are enabled on the rising edge of each clock cycle. Due to the clocking, the position of the data and the rest of the signals are now very predictable. Thus that data latch strobes can be positioned very precisely. Since the data valid window is very predictable, the memory can now be divided into four banks to allow internal cell pre-charge and pre-fetch. Burst mode is also added to allow consecutive address fetching without repeating the Ras strobe. Continuous Cas strobe would bring out consecutive data as long as they are from the same Row. DDR memory works very similar to the SDR except that data is read at both leading edge and falling edge of the clock. Thus a single frequency clock can result in a data transfer as fast as twice the frequency of the clock. The new generation of DDR memory is running at 200Mhz and 266Mhz data rate corresponding to clock frequencies of 100MHz and 133MHz. WAVEFORM DIAGRAM COMPARING SDRAM, SDR AND DDR.